How to Apply High-Speed Differential MUX/DEMUX Bus Switches on Ultra-Fast Serial Buses

Technical Overview: High-speed serial systems in servers, test equipment, and robotics increasingly require flexible routing of differential signals within limited board space while preserving signal integrity. This article examines how multiplexing and demultiplexing affect insertion loss, return loss, isolation, crosstalk, propagation delay, skew, and eye-diagram performance. It introduces Toshiba’s TDS5B212MX and TDS5C212MX bidirectional MUX/DEMUX switches, which support transfer rates up to 64 GT/s and offer bandwidths of 29 and 34 GHz, respectively. Application examples demonstrate how these compact devices can switch PCIe lanes, route USB4 accessories between personal computers, and direct DisplayPort signals to DisplayPort or HDMI outputs. (Overview courtesy of ChatGPT)

Server, industrial test equipment, robotics, and personal computing applications are integrating more high-speed devices into increasingly limited board space. At the same time, serial interfaces such as PCI Express (PCIe), USB4, Thunderbolt, and DisplayPort continue to increase their data rates. To conserve space and minimize cost, designers need to share interfaces across multiple devices or reroute differential signals to alternate paths.

Multiplexing and demultiplexing (MUX/DEMUX) provide flexibility for sharing and routing, but designers must understand the associated effects, select the appropriate MUX/DEMUX switch, and apply it correctly.

This article discusses the signaling and interface challenges designers face in complex high-speed systems. It then introduces high-speed MUX/DEMUX bus switches from Toshiba and shows how they can be applied to address these challenges.

The challenges of high-speed signal design

Faster signals in tighter form factors across industries require designers to manage interfaces carefully to minimize space and cost while preserving signal integrity. Although bus switches for MUX/DEMUX are widely available, inserting them into a high-speed signal path introduces resistance, capacitance, and impedance discontinuities. At PCIe 6.0 and USB4 Version 2.0 data rates, these effects can increase insertion loss, reflections, crosstalk, and timing skew, reducing the signal-integrity margin. However, designers can mitigate these effects by using high-bandwidth passive differential MUX/DEMUX bus switches that provide the required routing while minimizing additional signal loss and distortion.

MUX/DEMUX devices are electronic switches that control a signal's path. A 2:1 MUX selects one of two input paths and connects it to a single output, while a 1:2 DEMUX routes one input to one of two output paths. Because these passive switches are bidirectional, the same device can perform either function depending on signal direction. Electrically, the arrangement is analogous to a single-pole, double-throw (SPDT) switch.

Because most high-speed data links use differential signaling, MUX/DEMUX devices are configured to handle differential pairs. Toshiba has introduced two high-speed differential mux/demux devices, the TDS5C212MX,ELF and TDS5B212MX,ELF, that operate at data transfer rates up to 64 gigatransfers per second (GT/s).

Both the TDS5C212MX,ELF and TDS5B212MX,ELF are two-differential-circuit (2:1) IC switches. They use MOSFETs as switches and are therefore passive MUXes, operating bidirectionally as either a MUX or a DEMUX, as shown by the block diagram (Figure 1, top) and truth table (Figure 1, bottom).

Figure 1: Shown are the block diagram (top) and truth table (bottom) for a Toshiba differential MUX/DEMUX. (Image source: Toshiba)

Both devices have two differential channels, A0 and A1, on one side. The other side has two differential channels, B0 and B1, and C0 and C1. The SEL (select) line controls the connections. When the SEL line is logic low, the An ports connect to the Bn ports. When SEL is logic high, the An ports connect to the Cn ports. 

The active-low output enable (OE) input opens all switches when set to a logic high.

MUX/DEMUX technology innovation

The TDS5C212MX,ELF and TDS5B212MX,ELF are fabricated using Toshiba’s proprietary TaRF SOI process. This is an original front-end process for building complementary metal oxide semiconductor (CMOS) devices on a silicon-on-insulator (SOI) substrate for RF applications, including low-noise amplifiers and switches. The process delivers channels with high signal integrity and bandwidths up to 34 gigahertz (GHz) (Figure 2).

Figure 2: Shown are the frequency response curves for the TDS5B212MX and TDS5C212MX MUX/DEMUX. (Image source: Toshiba)

The frequency response curves show the -3 decibel (dB) bandwidth of both devices. The TDS5B212MX has a bandwidth of 29 GHz, while the TDS5C212MX has a bandwidth of 34 GHz.

The TDS5B212MX (Figure 3, left) uses the same pin assignments as earlier legacy products, whereas the TDS5C212MX (Figure 3, right) has pin assignments optimized for high-frequency performance. Note that the A0, C0, and C1 pins on the TDS5C212MX are reversed relative to those on the TDS5B212MX.

Figure 3: The TDS5B212MX (left) and TDS5C212MX (right) provide the same switching function but use different pin assignments. (Image source: Toshiba)

Both devices are enclosed in a 16-pin XQFN surface-mount package with a footprint of 2.4 mm × 1.6 mm, a height of 0.4 mm, and contacts spaced at a 0.4 mm pitch. This small size makes the package suitable for high-density circuits.

The TDS5B212MX and TDS5C212MX are passive switches, unlike digital redrivers and retimers, which reshape or amplify signals. They connect and switch differential signals without compensation or regeneration. The direct switching path results in minimal latency and lower power consumption. The switching operation is protocol-agnostic and transparent, independent of any serial protocol; it can be used with any high-speed differential serial interface. The switches are also symmetric and operate in both signal directions.

Both devices operate from a supply voltage (V_cc) of 1.6 to 3.6 volts. The typical operating current is 70 µA with the switch-signal voltage at 0 volts and 140 µA at 2 V. They are rated to operate over a temperature range of -40°C to +125°C.

Signal integrity characteristics of the TDS5B212MX and TDS5C212MX

The signal integrity of high-speed serial transmission paths is evaluated using several signal loss characteristics, including insertion loss and return loss. Insertion loss measures the signal power loss as it passes through a device’s signal path. Return loss quantifies the power reflected back due to impedance mismatches, which can degrade signal integrity.

The Toshiba switch products minimize distortion and transmission losses in demanding systems with outstanding dynamic signal integrity characteristics (Table 1). These parameters are frequency-dependent and were measured at 16 GHz.

Table 1: Shown are the key signal integrity characteristics of the TDS5B212MX and TDS5C212MX at 16 GHz. (Table source: Art Pini, from Toshiba datasheet)

The timing characteristics include propagation delay, bit-to-bit skew, and channel-to-channel skew.

Both devices have a typical propagation delay of 26 picoseconds (ps) and a typical channel-to-channel skew of 2 ps. The TDS5B212MX and TDS5C212MX have typical bit-to-bit skews of 2 and 3 ps, respectively. Their maximum switching times are 450 nanoseconds (ns) for turn-on and 110 ns for turn-off.

The eye pattern, generated by overlaying each bit of the signal waveform, is a useful technique for visually evaluating differential signal transmission. An ideal eye pattern shows a wide opening both vertically and horizontally, with short transition times. Eye degradation becomes more pronounced with increasing noise, losses, and crosstalk, making the eye diagram an effective measure of differential signal waveform quality.

Comparing the eye diagram performance of a straight-through differential conductor path (Figure 4, top), the TDS5B212MX (Figure 4, lower left), and the TDS5C212MX (lower right) demonstrates these components' high performance (Figure 4).

Figure 4: Shown is a comparison of eye-diagram results for a 64 GT/s PCIe 6.0 signal using a through-board reference path (top), the TDS5B212MX (lower left), and the TDS5C212MX (lower right). (Image source: Toshiba)

PCIe 6.0 uses PAM4 encoding to double the effective data rate, resulting in three stacked eyes. The stacked eyes make eye-opening performance even more critical. The visual results with the Toshiba components are very good, showing wide eye openings.

The quantitative results of the PCIe 6.0 eye analysis show differences in eye height, eye width, and edge jitter (Table 2).

Table 2: Shown are the PCIe 6.0 eye pattern evaluation results. (Table source: Toshiba)

Compared with the through-board reference path, the TDS5B212MX reduced eye height by 38 to 61 millivolts (mV), while the TDS5C212MX produced smaller reductions of 17 to 27 mV. Similar results were observed for eye width. The higher-bandwidth MUX has faster transition times, so less vertical noise maps into jitter. This explains the generally smaller changes in eye width and jitter for the higher-bandwidth TDS5C212MX.

Applying the differential MUX/DEMUX switches

The wide bandwidth and high signal fidelity of the TDS5B212MX and TDS5C212MX make them suitable for high-speed interfaces, including PCIe 6.0, Compute Express Link (CXL) 3.x, USB4 Version 2.0, DisplayPort 2.1, Thunderbolt 5, and Serial Attached SCSI (SAS) 3.0.

Consider a PCIe application in which the CPU must connect to several PCIe slots (Figure 5).

Figure 5: Shown is the use of a MUX/DEMUX to switch eight PCIe lanes between slots 1 and 2. (Image source: Toshiba)

The motherboard has two 16-lane PCIe connectors. Using a MUX/DEMUX, these can be reconfigured as either a single 16-lane slot or dual 8-lane slots.

The CPU uses eight transmit (Tx) and receive (Rx) lanes connected to slot 1. There are eight additional lanes available. The CPU can switch its connection between the two slots using eight MUX/DEMUX devices, each with one Tx and one Rx line per lane.

Consider an application switching USB4 accessories between two PCs through a USB hub (Figure 6).

Figure 6: This application uses a MUX/DEMUX device within a USB hub to switch accessories between two PCs. (Image source: Toshiba)

The select switch controls the MUX/DEMUX device, routing the keyboard and mouse connected to the USB hub to the selected PC.

Another application uses the TDS5C212MX to route a DisplayPort signal to either a DisplayPort or HDMI output, with the hub circuitry providing the required output-interface functions. The switch’s wide bandwidth and low insertion loss support the high-speed differential signals used by DisplayPort 2.1.

Conclusion

Limited board space and higher data rates require designers to share interfaces across multiple devices or reroute differential signals to alternate paths with minimal impact on signal integrity. Toshiba’s high-speed MUX/DEMUX switches meet this need with bidirectional 2:1 MUX and 1:2 DEMUX operation at transfer rates up to 64 GT/s. Their high bandwidths, compact packages, and alternative pinouts let designers choose between legacy pin compatibility and higher-frequency performance across a wide range of high-speed serial interfaces.